**Foreword**
With the rapid advancement of digital technology and IC manufacturing, the market for Digital-to-Analog Converters (DACs) has expanded significantly, especially in fields like mobile phone production, wireless communication, and more. In this digital era, DACs that offer high update rates, stability, and low power consumption are highly sought after. As semiconductor processes have advanced into the nanoscale, DAC performance has seen remarkable improvements in speed and power efficiency. To achieve high-performance DACs, it is not only about the manufacturing process but also about the stability of the bandgap reference source. The bandgap reference, known for its low temperature coefficient, is widely used in analog and mixed-signal circuits. However, any error in the reference voltage directly affects the DAC output, as the analog output is proportional to the product of the reference voltage and the input digital value. Therefore, the reference must be more accurate than the DAC’s design specification. A low-power, low-temperature-coefficient, and high-power-supply-rejection reference is essential. To reduce errors, techniques such as operating MOS transistors in subthreshold mode and using full-MOS structures have been proposed. However, these methods still need optimization in terms of power supply rejection. By combining the bandgap principle with self-bias current mirrors and startup circuits, a reference with improved power supply rejection can be achieved. Additionally, the design should consider op-amp limitations to enhance overall performance. Simulation results show that there is still room for improvement.
After analyzing various approaches and considering the practical needs of DACs, this paper uses a 40 nm CMOS process. Based on traditional design principles, negative feedback is used to obtain a more stable PTAT current. A proportional resistance design improves circuit stability. In layout, the current mirror structure is replaced with resistors to reduce mismatch and area, making the design simpler and more practical.
**1 Basic Design Principle of Bandgap Reference**
The traditional bandgap reference relies on the characteristics of an operational amplifier and bipolar junction transistors (BJTs). It uses the VBE of a BJT, which has a negative temperature coefficient, and the difference in collector currents (ΔVBE), which has a positive temperature coefficient. By adjusting resistor values, the temperature coefficients cancel each other out, resulting in a stable reference voltage. This paper designs a high-stability bandgap reference based on 40 nm CMOS technology. Figure 1 shows the actual circuit.
**1.1 Reference Core Circuit Diagram Analysis**
As shown in Figure 1, when the supply voltage and enable signal are provided, the bandgap reference operates normally. The voltage drop across R1 is calculated using the formula in [9]. Since VBE(Q1) has a negative temperature coefficient and ΔVBE has a positive one, by choosing appropriate R1 and R2 values, the total temperature coefficient can be zero, leading to a more stable reference voltage.
**1.2 Startup Circuit Analysis**
When EN is low, the startup circuit ensures that the operational amplifier remains inactive until the enable signal is high. This helps prevent improper operation and reduces power consumption. When EN is high, the circuit activates, allowing the reference to function properly. The startup circuit enhances the stability and fault tolerance of the system.
**1.3 OPAMP Actual Circuit Diagram Analysis**
The OPAMP in Figure 1 operates in deep negative feedback, ensuring that the input voltages are equal. This feature is crucial for achieving a temperature-independent bandgap voltage. The two-stage amplifier includes P5, P6, N5, N6, P9, R3 for the first stage and N7, N8, P7, P8 for the second. The circuit meets the design requirements with a gain of 67.8 dB.
**2 Simulation Results and Layout**
**2.1 Layout and Post-Simulation Results Analysis**
The circuit was simulated using a 40 nm CMOS process with Cadence and Spectre software. The test results showed a reference voltage of 1.184 V, a startup time of 0.5 μs, and a temperature drift coefficient of 8.7×10â»âµ/°C. The PSRR at low frequency was -85 dB, indicating good power supply rejection.
**2.2 Comparison and Analysis with Other Literature Parameters**
Table 1 compares this work with existing literature. While the temperature stability is not perfect, the power supply rejection is strong. Further improvements are needed to balance the positive and negative temperature coefficients in the circuit.
**3 Conclusion**
This paper presents a high-precision, fast-start CMOS bandgap reference with a reference voltage of 1.184 V, a startup time of 0.5 μs, and a PSRR of -85 dB. The design reduces parasitic effects and optimizes layout for integration into high-speed DACs. The reference is suitable for use in high-resolution DA converters and demonstrates strong potential for future applications.
Ceramic Insulator,Ceramic Electrical Insulators,Ceramic Standoff Insulators,Ceramic Isolators
Yixing Guangming Special Ceramics Co.,Ltd , https://www.yxgmtc.com